Heptaphasis

7 phase LFO for Eurorack

Based on Yusynth Quadrature VC-LFO (which seems to be an adaptation of a state variable filter)
Frequency range: 19 Hz - 0.0008 Hz (20 min)
Amplitude: +-5V (10Vpp)
Power draw: +30mA, -27mA (depends on used LEDs)
Startup stabilisation: < 13 sec
Please copy, modify and let me know about your results.

youtube.com/watch?v=A-SHyvcifvg

Only 7 phases because I want it to be as small as possible (3HP)

The 8th phase (315°) can still be obtained by inverting the 4th output (135°).

Schematic


Eagle: heptaphasis.sch, heptaphasis.brd (not the final version yet)

BOM

C9, C110805 470nFintegrator feedback, must be matched to within 1% or better. Lower value = faster oscillations.
C12, C14, C15, C16, C17, C18, C19, C21, C22, C24, C25, C26, C270805 100nFpower filtration, value not critically important
C3, C4, C5, C6, C7, C8, C230805 1nFstabilisation caps, value not critically important, but higher values will introduce constant phase shift (1nF = 0.1ms, 10nF = 1ms) and filter out lower frequencies. Will work even if not installed.
C100805 22pF
C200805 100nFfor startup amplitude circuit
C1, C2THT 10µF electrolytic2mm lead pitch, <5mm diameter. Power filtration: 10µF or more.
C13THT 10µF electrolytic2mm lead pitch, <5mm diameter. Higher value=longer increased frequency at startup
T2, T3, T5, T6, T7, T8, T9SOT23 NPNled driver, for example BC847
T1SOT23 NPNeg. BC847
T4SOT23 PNPeg. BC857
BCM857SOT-457-6 matched PNP pairfor example
IC1, IC3SOIC14 TL074op amp
IC2SOIC8 TL072op amp
IC4SOIC16 LM13700 or NJM13700OTA
R29, R34, R37, R41, R45, R49, R530805 470Ω-2kΩLED current limiting, choose according to desired LED brightness
R30, R35, R38, R41, R48, R51, R550805 1kΩOutput buffer protection
R31, R36, R40, R43, R47, R52, R540805 330kΩLED driver gate. Too low value will distort the output waveform
R3, R40805 ~68kΩsumming resistors - value not too critical, but the pairs must be matched. The summing gain should be adjusted with TR2 and TR3 respectively
R5, R6
R8, R440805 ~100kΩprimary inverting buffers - values not critical, gain should be adjusted with TR1 and TR4
R46, R500805 68kΩ-100kΩfor inverting buffers - values not critical, but the pairs must be matched
R7, R39
R1, R2
R260805 22kΩ
R190805 <300kΩlower value will shorten the time the frequency is temporarily increased during startup
R320805 100kΩlower value will result in lower startup amplitude
R240805 82kΩhigher value will restrict the frequency range
R330805 10Ω
R220805 220kΩ
R160805 100kΩfrequency CV input impedance
R170805 1.5kΩ
R180805 10kΩ
R23, R280805 2.2kΩ5%
R250805 33kΩ5%
R9, R100805 68kΩ1%
R11, R14, R15, R270805 820Ω1%
R12, R130805 47kΩ1%
R20, R210805 100kΩOTA linearization
TR1, TR2, TR3, TR4THT 100kΩcalibration trimpots. Vertical multiturn Y or W config
Z1, Z2SOD80 5.1v zener
D1, D2THT 1n5819polarity protection schottky, THT vertical installation recommended
F1, F20805 100mA PPTC polyfusefor example. Will work with 0805 10Ω resistors
7 LEDsselect R29, R34, R37, R41, R45, R49, R53 according to the LED brightness
8 jacksmono 3.5mm PJ302M7 of them with the switch/normalisation pin removed
1 potentiometerright angled Alpha 9mm 100kΩ linearThonk, the closer to 100kΩ the better the frequency range

Calibration

  1. Adjust TR1 to obtain +-5V (10Vpp) amplitude on the first output (COS 0°)
  2. Adjust TR4 to obtain +-5V (10Vpp) amplitude on the third output (SIN 90°)
  3. Adjust TR2 to obtain a nice +-5V (10Vpp) sine-like waveform on the sixth output (225°)
  4. Adjust TR3 to obtain a nice +-5V (10Vpp) sine-like waveform on the fourth output (135°)

Circuit description

Core


Yusynth quadrature LFO core: outputs a +-8.33V cosine and sine (90° phase shift). Additionally a small current is supplied to the OTA linearizing diode bias inputs, significantly improving the sine waveshape.

With C9 = C11 = 470nF, R12 = R13 = 47kΩ, and R20 = R21 = 100kΩ the frequency range is 19Hz - 0.0008Hz (20min). The frequencies can be increased by decreasing C9, C11 or decreasing R12, R13 or increasing R20, R21 (ie. decreasing the OTA linearization current). The frequency range can also slightly vary depending on the power source and how close the potentiometer is to 100kΩ. Component changes might result in slightly different amplitudes (can be corrected by calibration with the four trimpots) or even oscillation stability issues.

Startup frequency


The core circuit by itself takes several cycles to start oscillating and settle on a stable amplitude, at very low frequencies it might take even hours. This sub-circuit temporarily increases the frequency for a couple of seconds (by supplying more current to the OTA amp bias input) so that the amplitude settles much quicker (typically under 13 seconds with the help of another amplitude startup circuit).

C13 (10µF) and R19 regulate how long the transistor T1 will be opened to increase the oscillation frequency. The duration of increased frequency can be shortened by decreasing the C13 capacitance or decreasing the resistance of R19.

Startup amplitude


Normally the core circuit would start from zero amplitude and slowly build up until it would settle on the stable final amplitude. This sub-circuit attempts to charge one of the main core capacitors during the first couple of microseconds after powerup, boosting the amplitude so that the startup is faster. This boosting is not very precise because it depends on how the power source behaves during this short time.

R33 (10Ω) limits the charging current, the larger the resistance, the slower the first integrator feedback capacitor C9 (470nF) will charge. R32 (100kΩ) and C20 (100nF) regulate how long the transistor T4 will be opened = how long C9 will be allowed to charge. More charging time or more charging current will result in higher startup amplitude.

startup behavior with this sub-circuit:

startup behavior without this sub-circuit:

continued with 10x lower time resolution:

sin+cos sum


By adding the SIN + COS signals we get another SIN signal phase-shifted by PI/4 (45°). This summing circuit is also an inverting buffer, so the result is additionally phase-shifted by another 180° The summed output signal is stronger by a factor of sqrt(2), so the trimpot should be used to dial a desired resulting amplitude (around 48kΩ when two 68kΩ summing resistors are used). The closer the input signals are to sine and cosine waveforms, the closer the output summed signal waveform will resemble the shape of the input waveforms. If the input signals are slightly distorted, the output summed waveform will look different from the inputs.